The method further includes forming a layer of photoresist and then patterning the layer of photoresist to protect a middle portion of the polysilicon layer of the non-silicided poly resistor stacks , etching the exposed portions of the dielectric capping layer , and removing the patterned ...
5. The device according to claim 1, further comprising a silicide layer provided on each of the second conductive layer, the third conductive layer, and the fourth conductive layer. 6. The device according to claim 1, wherein the gate insulating film and the first insulating film are made...
Passive devices such as resistors and capacitors are provided for a 3D non-volatile memory device. In a peripheral area of a substrate, a passive device includes alternating layers of a dielectric such as oxide and a conductive material such as heavily doped polysilicon or metal silicide in a ...
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and etch processes required by the method of the present invention. It will be understood that the gate electrode material may include a silicide or polycide composition. The chemistry and fabrication techniques employed in the method of the present invention are known in the art and constitute co...
A kind of method being used to form a non-self-aligned polycrystalline silicon resistor by preventing boron one outside diffusion phenomena be arranged to obtain an exact value of a non-self-aligned polycrystalline silicon resistor during technical flow design. One polysilicon layer (102) is ...
The method further includes forming a layer of photoresist 180 and then patterning the layer of photoresist 180 to protect a middle portion of the polysilicon layer 100 of the non-silicided poly resistor stacks 30, etching the exposed portions of the dielectric capping layer 170, and removing ...
In order to reduce the required storage area, proposed a 3T storage unit, the storage unit preferably comprises two NMOS transistors of the bridge transistors (MN0, MN1) composed of bridge, preferably a PMOS transistor, a readout transistor, and silicided polysilicon fuse resistor (R). 该...
In order to reduce the required storage area, presents a 3T storage unit, the storage unit preferably comprises two NMOS transistor bridge transistors (MN0, MN1) of the bridge formed, preferably a PMOS transistor, readout transistor, and silicided polysilicon fuse resistor (R). 该读出晶体管...
(an N− layer acting as a third diffusion layer)29aacting as a ballast resistor are formed directly under the silicide block51a, that is, on that surface portion of the P-well region11awhich corresponds to the portion between the second and third N+ diffusion layers23aand24a. The P−...