必应词典为您提供charge-trapping-memory的释义,网络释义: 电荷补陷记忆体;电荷捕陷式记忆体;电荷捕捉记忆体;
A ONO storage layer sequence (9) Department located between the channel region and the gate electrode, as part of a character line (10, 11).F·劳J·威尔勒CN1577865A Jul 23, 2004 Feb 9, 2005 因芬尼昂技术股份公司 Charge trapping memory cell...
The accumulation process of trapped charges in a TANOS cell during P/E cycling is investigated via numerical simulation. The recombination process between trapped charges is an important issue on the retention of charge trapping memory. Our results show that accumulated trapped holes during P/E cyc...
Nanomaterials-based Charge Trapping Memory Devices provides a detailed explanation of memory device operation and an in-depth analysis of the requirements of future scalable and low powered memory devices in terms of new materials properties. The book presents techniques to fabricate nanomaterials with th...
Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region Scaling a charge trap memory device and the article made thereby. In one embodiment, the charge trap memory device includes a substrate having a source region, a drain region, and a channel ...
19.A method of making a charge-trapping memory cell, the method comprising:providing a semiconductor body;forming a gate dielectric over a surface of the semiconductor body, the gate dielectric having a layer thickness, wherein a charge-trapping layer is formed within the gate dielectric, the ch...
1. 电荷捕捉技术 比如飞索的电荷捕捉技术(Charge-Trapping),它可以在更小的空间内存储更多的信息,能用在智能电网、医疗、工业自动化 … news.mydrivers.com|基于23个网页 2. 电荷捕获型 尔必达今天宣布,他们已经同美国Spansion公司合作,开发出了全球首款电荷捕获型(Charge-trapping)4Gb容量SLC NAND … ...
A semiconductor memory with vertical charge trapping memory cells, wherein on an upper surface of a semiconductor body (1) or substrate, a plurality of par... J Deppe,C Kleint,C Ludwig,... 被引量: 0发表: 2002年 Programming Transients of Trapping Nitride Storage Flash Memory Cells and Evi...
Charge-trapping memory with high-κ insulator films is a candidate for future memory devices. Many efforts with different indirect methods have been made to confirm the trapping position of the charges, but the reported results in the literatures are contrary, from the bottom to the top of the...
The memory cell is arranged in a ridge of semiconductor material forming a fin with sidewalls and a channel region between source and drain regions. Memory layer sequences provided