1、两中mipi摄像头均挂在i2c4下 2、Camera0的复位GPIO是GPIO3_D4, 时钟信号是CLK_CIF_OUT 3、Camera1的复位GPIO是GPIO3_D2, 时钟信号是CIF_WIFI 4、通过查阅GC2053的规格书,及摄像头硬件,确认地址为0x3f和0x37 由于两个都是GC2053, 但配置的时候不能出现两个相同的节点,且由于是同一路I2C,所以也不能...
remote-endpoint = <&csidphy_out>; }; }; }; &i2c2 { status = "okay"; pinctrl-0 = <&i2c2m1_xfer>; gc2385: gc2385@37{ status = "okay"; compatible = "galaxycore,gc2385"; reg = <0x37>; clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3...
clock-names ="xvclk"; pinctrl-0= <&cif_clk>; clocks = <&cru CLK_CIF_OUT>; reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing ="front"; rockchip,camera-module-name ="default"; rockchip,camera-module-lens-name ="...
clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; pwdn-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; rockchip,camera-module-index...
内核修改配置 修改相关内核设备树文件以下配置：ov5648: ov5648@36 { status = "okay"; compatible = "ovti,ov5648"; reg = <0x36>; clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; ...
vcm-rated-current = <85>; rockchip,vcm-step-mode = <5>; rockchip,camera-module-facing = "back"; }; gc8034: gc8034@37 { compatible = "galaxycore,gc8034"; reg = <0x37>; clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; //...
clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; //sensor mclk pinctl设置。如果sensor的工作时钟由主控提供,则此处必须配置 pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; // reset管脚分配及有效电平 ...
clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; pwdn-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; ...
clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; pwdn-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; ...
clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; pwdn-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; ...