1、REFCLK_OUT(GPIO0_A0) 示例dts:arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10.dtsi中的gc5025时钟配置 gc5025: gc5025@37 { .….. clocks = <&pmucru CLK_WIFI>; clock-names = "xvclk"; pinctrl-names = "default"; pinctrl-0 = <&refclk_pins>; }; 2、CAM_CLKOUT0(GPIO4_A7)...
T21 MIPI_CSI_RX_CLK0N MIPI_CSI_RX_CLK0N T22 MIPI_CSI_RX_CLK1P MIPI_CSI_RX_CLK1P T23 MIPI_CSI_RX_CLK1N MIPI_CSI_RX_CLK1N T24 CIF_CLKOUT CIF_CLKOUT/EBC_GDCLK/PWM11_IR_M1/GPIO4_C0_d T25 REFCLK_OUT_CAM REFCLK_OUT/GPIO0_A0_d 审核编辑:汤梓红 打开APP阅读更多精彩内容 声明...
一、 产品简介 四核高性能 AI 核心板 Core-3568J 采用Rockchip新一代64位处理器RK3568,集成双核心...
remote-endpoint = <&dphy1_in>; data-lanes = <12>; }; }; }; gc2053_2: gc2053_2@3f{ status ="okay"; compatible ="galaxycore,gc2053"; reg = <0x3f>; power-domains = <&power RK3568_PD_VI>; pinctrl-names ="default"; clock-names ="xvclk"; pinctrl-0= <&refclk_pins>; clock...
65 REFCLKOUT_GPIO0_A0 66 SDMMC0_DET_L_GPIO0_A4 67 TP_RST_L_GPIO0_B6 68 I2C1_SDA_TP_GPIO0_B4 69 PWM7_IR_GPIO0_C6 70 LCD1_BL_PWM5_GPIO0_C4 71 TP_INT_L_GPIO0_B5 72 USB_HOST_PWREN_H_GPIO0_A6 73 CPU_AVS_GPIO0_B7 74 RTCIC_INT_L_GPIO0_D3 75 VGA_PWREN_...
pinctrl-0= <&refclk_pins>; assigned-clocks = <&pmucru CLK_WIFI>; assigned-clock-rates = <24000000>; clocks = <&pmucru CLK_WIFI>; clock-names = "soc_24M"; #sound-dai-cells = <0>; rk628,rgb-in; rk628,hdmi-out; mode-sync-pol=<0>; ...
remote-endpoint = <&xc7160_out>;data-lanes = <1 2 3 4>;};};port@1 { reg = <1>;#...
●REFCLK_OUT：默认24MHz时钟输出，可提供给Camera等设备当工作时钟 ●CLK32K_OUT0：32.768KHz时钟输出...
}; }; &rgb { status = "okay"; ports { port@1 { reg = <1>; rgb_out_hdmi: endpoint { remote-endpoint = <&rgb_in_hdmi>; }; }; }; }; &rgb_in_vp2 { status = "okay"; }; &route_rgb { status = "okay"; connect = <&vp2_out_rgb>; }; &pinctrl { refclk { /omit-...
pinctrl-0 = <&refclk_pins>; assigned-clocks = <&pmucru CLK_WIFI>; //assigned-clocks = <&pmucru 28>; assigned-clock-rates = <24000000>; clocks = <&pmucru CLK_WIFI>; clock-names = "soc_24M"; // pinctrl-names = "default"; ...