5451804VLSI device with global planarization1995-09-19Lur et al.257/330 5362662Method for producing semiconductor memory device having a planar cell structure1994-11-08Ando et al.438/278 5231038Method of producing field effect transistor1993-07-27Yamaguchi et al.438/303 ...
in the "twin-tub" CMOS process. A complete description of this CMOS process, which is useful but not necessary for the understanding of the present invention, can be found in the article "Twin-Tub CMOS--A Technology for VLSI Circuits" by L. C. Parrillo et al appearing in International ...
Horii, H. et al., “A Novel Cell Technology Using N-doped GeSbTe Films for Phase Change RAM,” 2003 Symposium on VLSI Technology Digest of Technical Papers, pp. 177-178. Hwang, Y. N. et al., “Full Integration and Reliability Evaluation of Phase-change RAM Based on 0.24 μm-CMOS ...
Souri, S. J., “Interconnect Performance in 3-Dimensional Integrated Circuits”, PhD Thesis, Stanford, Jul. 2003. Uemoto, Y., et al., “A High-Performance Stacked-CMOS SRAM Cell by Solid Phase Growth Technique”, Symposium on VLSI Technology, 2010, pp. 21-22. Jung, S.-M., et ...
One new isolation scheme is Poly Buffered LOCOS (PBL), which employs a thin polysilicon layer between the oxide and nitride films in the LOCOS stack. PBL facilitates design rule shrinking and smaller cell size required for submicron and sub-half-micron device fabrication. This isolation scheme ...
1.An apparatus comprising:a substrate having a doping concentration;a memory cell comprising a charge storage device and a recessed access device, wherein the recessed access device extends into the substrate and is configured to induce a first depletion region in the substrate; andan isolation str...
3.The semiconductor chip according to claim 1, wherein the bulk device positioned in the bulk device region includes a DRAM cell having a trench capacitor, and the dummy trench is a dummy capacitor. 4.A semiconductor chip comprising:a base substrate;a bulk device region having a bulk growth...
4672410Semiconductor memory device with trench surrounding each memory cell1987-06-09Miura et al.357/23.6 4549927Method of selectively exposing the sidewalls of a trench and its use to the forming of a metal silicide substrate contact for dielectric filled deep trench isolated devices1985-10-29Goth...
5420061Method for improving latchup immunity in a dual-polysilicon gate process1995-05-30Manning437/57 5416348Current leakage reduction at the storage node diffusion region of a stacked-trench DRAM cell by sele
One skilled in the art will appreciate that a “system” could be embodied as a personal computer, a server, a console, a personal digital assistant (PDA), a cell phone, a tablet computing device, a smartphone or any other suitable computing device, or combination of devices. Presenting the...