Impact of BTI in SRAM bit-cells SRAMs occupy a large portion of on-chip silicon area in state-of-the-art designs. The 10 nm test chip included a 128Mbit SRAM providing 0.040 μm2 6 T high-density (HD) SRAM bitcell with 1:1:1 fins for Pull-up (PU), Pass-Gate (PG), and Pul...
Replacing pull-down transistors in SRAM cells, SAN OTP devices is used to compensate mismatches between the two branches. Through a self-convergent blanket programming operation, the new SRAM cell has been demonstrated to effectively suppress process variation effect, especially critical in low-voltage...
Low-frequency-noise investigation of n-channel bulk FinFETs developed for one-transistor memory cells 2012, IEEE Transactions on Electron Devices Effect of ionizing radiation on defects and 1/f noise in Ge pMOSFETs 2011, IEEE Transactions on Nuclear Science Flicker-noise impact on scaling of mixed...
STARNA CELLS STARPANEL STARPOINT ELECTRICS STARRAG STARRETT START ALL START INTERNATIONAL STARTCO ENGINEERING STARTECH STARTEK STAT SPIN STATE INDUSTRIES STATE OF THE ART STATEC SYSTEMS INC STATEC TECHNOLOGIES STATEK STATELINE STATES PRODUCTS STATES TERMINAL BLOCK STATIC CLEAN INTERNATIONAL STATIC CONTROL SERVI...
VLSI/ cell traversalgate arrayexact embeddingglobal wiringiterationsrerouting around congested areasmaster-slice chips3500 cellsA simple algorithm to perform ... Nair,R. - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 被引量: 121发表: 2004年 ...
Scan cells (14-16) are arranged between the logic circuit and the input-output buffers to provide test data to the logic circuit or output test data from the logic circuit according to a mode signal (SMODE). The component has at least one mode control cell (35) that generates a mode ...
In MSV design, high supply voltage is assigned to timing critical cells to guarantee performance, while low supply voltage is assigned to ot...Yujia Feng , Shiyan Hu, The epsilon-approximation to discrete VT assignment for leakage power minimization, Proceedings of the 2009 International Conference...
On structured gate forest VLSI design The opportunities for structured VLSI design on a Sea-of-Gates template are discussed. From a critique on the use of standard cells, the Gate Forest approa... G Roos,J Leenstra,T Schwederski,... - 《Microprocessing & Microprogramming》 被引量: 6发表...
Methods and apparatus for processing cells in an asynchronous transfer mode (ATM) communication system. An ATM cell processor provides a modulo arithmetic feature which permits branching on the modulo portion of the result of an arithmet... PV Bergantino,DJ Lussier - US 被引量: 9发表: 1998年...
Single cells constitute a fundamental unit of biological organization, yet most laboratory techniques are unable to characterize single cell behavior and instead measure average properties of many thousands of cells. Among cellular behav... N Cermak 被引量: 0发表: 2017年 THE H-l ROCKET ENGINE FOR...