Therefore, there is a need in the art for a receiver having differential inputs and outputs that exhibits low timing skew and, preferably, has a disable feature for use with intermittent data clocks. Such a rec
as to disable the redundant elements. Further, the redundancy enable/disable circuit of the present invention is formed with a minimal number of circuit components without requiring the use of an inverter, does not involve a complicated timing scheme, and is fabricated with a compact design layout...