Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal–oxide–semiconductor process. Our macro can perform 3D vector–matrix multiplication operations with an ...
16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devicesdoi:10.1109/ISSCC42613.2021.9365769Nonvolatile memory,Conferences,Solid state circuits,Artificial intelligenceBattery-powered tiny-AI edge devices require large-capacity nonvolatile compute-in...
STAR-SRAM: 43.06-TFLOPS/W, 1.89-TFLOPS/mm2, 400-Kb/mm2 Floating-Point SRAM-Based Digital Computing-in-Memory Macro in 28-nm CMOS 来自 IEEEXplore 喜欢 0 阅读量: 14 作者:CT Lin,J Oh,K Lee,M Seok 摘要: A digital computing-in-memory (DCIM) macro gains increasing attention as a key...
ArticleGoogle Scholar Xue, C.-X. et al. A 22nm 4Mb 8b-precision ReRAM computing-in-memory macro with 11.91 to 195.7 TOPS/W for tiny AI edge devices. InIEEE International Solid-State Circuits Conference (ISSCC)245–247 (IEEE, 2021). Khwa, W.-S. et al. A 40-nm, 2M-cell, 8b-pre...
A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices Article 20 December 2021 The growing memristor industry Article 16 April 2025 References Moore, G. E. Cramming more components onto integrated circuits. Electroni...
Then, some innovations in the array, macro, and input schemes, as well as some output-circuit considerations of recently silicon-verified RRAM-based CIM systems were reviewed. Peripheral circuit design, in particular the design of interface circuits, plays an important role in the whole system ...
1.A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs Paper:https://ieeexplore.ieee.org/abstract/document/10454278 2.A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in...
SRAM-based computing-in-memory macro with fully parallel one-step multibit computation IEEE Solid-State Circuits Letters (2022) Z. Xuan et al. A brain-inspired ADC-free SRAM-based in-memory computing macro with high-precision MAC for AI application J. Zhang et al. In-memory computation of ...
59Citations 10Altmetric Metrics Abstract Computing in memory (CIM) could be used to overcome the von Neumann bottleneck and to provide sustainable improvements in computing throughput and energy efficiency. Underlying the different CIM schemes is the implementation of two kinds of computing primitive: ...
A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices Article 20 December 2021 A full spectrum of computing-in-memory technologies Article 13 November 2023 A crossbar array of magnetoresistive memory devices for ...