A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices Je-Min Hung, Cheng-Xin Xue, Hui-Yao Kao, Yen-Hsiang Huang, Fu-Chun Chang,
In this paper, we validate and calibrate the prediction of NeuroSim against a 40nm RRAM-based CIM macro post-layout simulations. First, the parameters of memory device and CMOS transistor are extracted from the TSMC's PDK and employed on the NeuroSim settings; the peripheral modules and ...
SPIKA: an energy-efficient time-domain hybrid CMOS-RRAM compute-in-memory macro doi:10.3389/felec.2025.1567562Frontiers in ElectronicsHumood, KhaledPan, YihanReynolds, GrahameMughal, MohammedWang, ShiweiSerb, AlexanderProdromakis, Themis
et al. A 1Mb multibit ReRAM computing-in-memory macro with 14.6 ns parallel MAC computing time for CNN-based AI edge processors. In IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers 388–390 (IEEE, 2019). Xue, C.-X. et al. A 22 nm 2 Mb ...
Yan, B. et al. A 1.041-Mb/mm227.38-TOPS/W signed-INT8 dynamic-logic-based ADC-less SRAM compute-in-memory macro in 28nm with reconfigurable bitwise operation for AI and embedded applications. In2022 IEEE International Solid-State Circuits Conference188–190 (IEEE, 2022);https://doi.org/10....
In the era of big data and artificial intelligence, hardware advancement in throughput and energy efficiency is essential for both cloud and edge computations. Because of the merged data storage and computing units, compute-in-memory is becoming one of t
This work introduces a digital SRAM-based near-memory compute macro for DNN inference, improving on-chip weight memory capacity and area efficiency compare... H Kim,J Mu,C Yu,... - 《IEEE Transactions on Circuits & Systems I Regular Papers A Publication of the IEEE Circuits & Systems Socie...
Uppercase Upper case all text in the currently marked block. Lowercase Lower case all text in the currently marked block. Options Query SET Options Display settings of all available QUERY command options with the exception of QUERY MACRO. Edit SET Options Edit a temporary CMX command file ...
Learn how to make the most of the Source Page in Nsight Compute to quickly pinpoint and resolve bottlenecks in your CUDA kernels. Watch From the Macro to the Micro: CUDA Developer Tools Find and Fix Problems at Any Scale Understand how your multi-node CUDA workload is scaling across machi...
A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices Article20 December 2021 A computing-in-memory macro based on three-dimensional resistive random-access memory ...