Built-in self-test system for VLSI circuit chipsUS4701920 Nov 8, 1985 Oct 20, 1987 Eta Systems, Inc. Built-in self-test system for VLSI circuit chipsUS4701920 * 1985年11月8日 1987年10月20日 Eta Systems, Inc. Built-in self-test system for VLSI circuit chips...
第七章內建自我測試(Built-in Self Test) 7.1前言 在數位科技演進下,超大型積體電路( Very Large Scale Integration )已經有戲劇性的影響,這些影響不僅使VLSI減少製作面積與製造成本,同時也增加電路的複雜度。就這成效上而言VLSI的技術的確帶來性能上的重大改善。在這些VLSI實現的系統中,令人樂見的改善成就了效率與...
第七章內建自我測試(Built-inSelfTest) 7.1 在數位科技演進下,超大型積體電路(VeryLargeScaleIntegration)已經有戲劇 性的影響,這些影響不僅使VLSI減少製作面積與製造成本,同時也增加電路的 複雜度。就這成效上而言VLSI的技術的確帶來性能上的重大改善。在這些VLSI 實現的系統中,令人樂見的改善成就了效率與成本上很大...
Notes 1. In [22], a was taken to be $0.05/s for an ATE. Without loss of generality, we consider a to be 10% of the value for BIST in this test case. References M. Bushnell, V.D. Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits, vol....
5138619Built-in self test for integrated circuit memory1992-08-11Fasang et al.371/22.5 5084874Enhanced test circuit1992-01-28Whitset, Jr.371/22.4 4918378Method and circuitry for enabling internal test operations in a VLSI chip1990-04-17Katircioglu et al.371/22.4 ...
BUILT-IN SELF-TEST SYSTEM FOR VLSI CIRCUIT CHIPS A system (10) self-control logic incorporated in a circuit board (12) large scale integrated (LSI) for performing dynamic tests of the operation of the main logic function (14) comprises a control register (32) containing a series of sta.....
- Defect & Fault Tolerance in Vlsi & Nanotechnology Systems 被引量: 0发表: 2010年 Testing and Reliability Techniques for High-Bandwidth Embedded RAMs Multiport RAMBIST (built-in self-test)BISR (built-in self-repair)Column-multiplexed addressingApplication-specific integrated circuits (ASICs) and ...
An integrated circuit with random access memory (RAM) and a built-in self tester for the RAM is disclosed. The built-in self tester includes a RAM BIST controller, a comparator, and a BIST I/O. The RAM BIST controller controls the RAM during a test where the RAM includes data, address...
The present invention concerns circuit testing. More particularly, the present invention relates to built-in-self-test (BIST) circuitry for testing a phase locked loop (PLL) circuit. Once manufactured, it is necessary to test very large scale integrated (VLSI) circuits to detect processing faults...
A built-in, i.e., on-chip, self-test system for a VLSI logic or memory module. A deterministic data pattern generator is provided on the VLSI chip, and operates to test a chip module and provide a fail/no-fail result, along with data identifying where the fail occurred. This location...