- TTBR1_EL1 holds identity mapping of all 8GiB of memory, using PGD → 8xPUD → 512 blocks of 2 MiB each. Device memory marked in MAIR_EL1 as nGnRnE (0x44), rest marked as normal cacheable (0xff) - TTBR0_EL1 has the memory map from ELF (say first page mapped to PA 0x1_...