功能: Buffer/Line Driver 高度: 1 mm 长度: 3 mm 输出类型: 3-State 系列: MC74VHC1G125 宽度: 1.5 mm 逻辑系列: VHC 逻辑类型: CMOS 通道数量: 1 Channel 电源电流—最大值: 1 uA 输入信号类型: Single-Ended 工作电源电压: 2 V to 5.5 V Pd-功率耗散: 200 mW 传播延迟时间: 11.5 ns 零件...
A test controller applies test stimulus signals to the input pads of plural die on a wafer in parallel. The test controller also applies encoded test response signals to the output pads of the plural die in parallel. The encoded test response signals are decoded on the die and compared to ...
CONSTITUTION:The buffer consists of P-channel TRs 5, 7, 10, 12 and N-channel TRs 6, 8, 9, 11, 13. With a control signal at a control terminal 2 set to a high level, the N-channel TRs 8, 13 are turned on and simultaneously the P-channel TRs 10, 12 and the N-channel TR ...
功能 Buffer/Line Driver 高度 4.57 mm 长度 24.33 mm 工作温度范围 - 40 C to + 85 C 输出类型 3-State 系列 SN74HCT240 宽度 6.35 mm 逻辑系列 HCT 逻辑类型 CMOS 通道数量 8 电源电流—最大值 8 uA 输入信号类型 Single-Ended 工作电源电压 5 V 传播延迟时间 42 ns at 4.5 ...
TRI-STATE BUFFER 专利名称：TRI-STATE BUFFER 发明人：ATAMI MASAHIRO 申请号：JP25267690 申请日：19900921 公开号：JPH04132310A 公开日：19920506 专利内容由知识产权出版社提供 摘要：PURPOSE:To reduce the number of transistors(TRs) being the components of a circuit and to decrease a chip occupied area ...
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A tristate buffer is a component in computer architectures that can either pass input to output when enabled or enter a high-impedance state (denoted by 'z') when disabled to prevent conflicts with other devices sharing the same data lines. ...
New Original ZHANSHI SN74HC244NSR SOIC-20 tristate output 8-way buffer and line driver Electronic components integrated chip IC No reviews yet Shenzhen Zhanshi Trading Co., Ltd.3 yrsCN Previous slideNext slide Previous slideNext slideKey attributes Other attributes Place of Origin America Brand ...
IC:chip;Type:integrated circuit; Specifications:other45;Serial Interfaces:other48;Memory Type:other53;Current - Output (Max):other13;Voltage - Off State:other34;Current Transfer Ratio (Min):other31;Voltage - Supply:other15;Input Range:other42;Voltage - F
Controlling CMOS, tri-state buffer circuit - applying voltage, lower than operational supply voltage, to gate of FET coupled to driver circuit ground The method involves driving a series-connected P-type MOSFET (FET1) and an N-type ... LEE, CHEOL-HEE, DAEGU, KR 被引量: 1发表: 1994年 ...