These on-chip transformers are designed and simulated using Virtuoso Layout Editor in CADENCE design software. Physical parameters of the transformer such as winding scheme, metal width and coupling coefficient have been proposed in this paper
The transformer, based on 20 coplanar waveguides whose impedances are gradually increased from 50 ohm to 93 ohm, is analyzed through Cadence Spectre schematic and post-layout simulations. The pulse generator and the linear tapered transmission line transformer are fabricated in the same technology, ...
The proposed ultra-wideband I/Q signal generation network is designed in GlobalFoundries 45 nm CMOS SOI process. Full-wave electromagnetic simulator Ansys and Cadence Virtuoso were used to simulate the circuit. The layout of I/Q signal generation network is shown in Figure 12, with a core chip...