An FPGA chip-based time-to-digital converter (TDC), comprising a pulse signal generator, a multi-tap signal delay chain, a trigger array, a connection network, a signal change edge searching and encoding circuit and a timestamp output circuit. The pulse signal generator is triggered by a ...
I am trying to implement a time-to-digital converter in Arria 10 FPGA, the schematic of which I have shown in the attached figure. I have many problems with this circuit because of its optimization by Quartus software. First of all, in HDL I described an adder to perform...
关键词: Field programmable gate array (FPGA Time-to-digital converter (TDC Time measurement 摘要: A time to digital converter includes: a first measurement unit measuring a time difference between a start signal and a stop signal as a first time unit by using a first delay line; a second ...
High-precision time-to-digital converter in a FPGA device The construction and design process of a high-resolution time-interval measuring system implemented in a SRAM-based FPGA device is discussed in this paper... A Aloisio,P Branchini,R Giordano,... - 2009 16th IEEE-NPSS Real Time Confere...
Timing system was used to measure the time of flight(TOF) of laser pulse in light detection and ranging(LIDAR). Performance of a LIDAR system is directly influenced by the properties of the timing system. A time to digital converter(TDC) based on FPGA was designed for photon counting LIDAR...
利用FPGA的进位链实现时间内插 基于FPGA的时间-数字变换(Time-Digital Conversion,简称:TDC)电路设计是核探测与核电子学国家实验室目前处于国际一流水平的一个研究领域。 自2006在IEEE 期刊上首次提出利用FPGA的进位链(Carry In Lines)实现时间内插(Time Interpolation)的方法以来,大幅度提高了TDC的时间分辨能力。 这...
A 128-channel, 710 M samples/second, and less than 10 ps RMS resolution time-to-digital converter implemented in a Kintex-7 FPGA IEEE Trans. Nucl. Sci., 62 (3) (June 2015), pp. 773-783 Google Scholar [46] J. Jansson, A. Mantyniemi, J. Kostamovaara Synchronization in a Multileve...
The time-to-digital converter(TDC) is an equipment which aims to measure the accurate time of the edges of the input signal. Our work present an I/O Tile based multi-phase clock time-to-digital TDC, which is implemented in Field-Programmable-Gate-Array(FPGA). A hit signal is sampled by...
We present a multihit time-to-digital converter (TDC) architecture implemented in a field-programmable gate array (FPGA) with minimized timing overhead. The TDC circuit provides two-level fine-time interpolation. The fine interpolator is a matrix of Vernier delay cells interconnected in a topology...
The TDC7201 has two built-in time-to-digital converters (TDCs) that can be used to measure distance down to 4 cm and up to several kilometers using a simple architecture, which eliminates the need to use expensive FPGAs or processors. Each TDC performs the function of a stopwatch and ...