val packagePinsWithPackageIOs = Seq( ("U12", IOPin(harnessIO.sramScanMode)), ("V12", IOPin(harnessIO.pllArstb)), ("V10", IOPin(harnessIO.pllScanClk)), ("V11", IOPin(harnessIO.pllScanEn)), ("U14", IOPin(harnessIO.pllScanIn)), ("V14", IOPin(harnessIO.pllScanOut)), ...
REGMAP_OFFSET.toSeq.sortBy(_._2):_*).map{case(k,v)=> (k, Integer.toHexString(v))}4 changes: 2 additions & 2 deletions 4 utils/srambist/src/bebe.rs Original file line numberDiff line numberDiff line change @@ -2,7 +2,7 @@ use crate::executor::Executor; use crate::pattern...
sum(Seq_r[i-1, j:j+16]) + np.sum(Seq_r[i:i+16, j-1]) + 16).astype(int) >> 5 pred = (np.sum(Seq_r[i-1, j:j+16]) + np.sum(Seq_r[i:i+16, j-1]) + 16) >> 5 icp = blk - pred sae = compute_sae(icp) return icp, pred, sae @@ -655,9 +657,6 @@...
qydkRIupOKrpqaWmmdUFK64lj/nq0NS2qtBeZKu9l1seqsEMr8Eild438v00c/8dNFgbC4LL29Ne HF+dnY/Oli9JZR94EZ/hS0T4htoIH1Im70uji8dUCMIi7aPnBQuJV4+K50P0pMKe4HhZc4mPpDD3 XePLxL6tS+PkqVhSPC6br043mzrMCh0r8tcVTcSK9+TSe6v9IVBr3x2A2kCtBwBq7QZq1QRq77sV UBuo/QBA7d1A7ZpAO/vuCdQG2nkAoJ3dQDs1...
libraryDependencies ++= Seq( @@ -234,6 +234,16 @@ lazy val nvdla = (project in file("generators/nvdla")) .settings(libraryDependencies ++= rocketLibDeps.value) .settings(commonSettings) lazy val caliptra_aes = (project in file("generators/caliptra-aes-acc")) .dependsOn(rocketchip, ro...
casePeripheryUARTKey=>Seq( UARTParams(address=0x54000000L, nTxEntries=256, nRxEntries=256, initBaudRate=baudrate)) /** * Config fragment for adding a GPIO peripheral device to the SoC * *@paramaddressthe address of the GPIO device
case PeripheryGPIOKey => Seq( GPIOParams(address = 0x10012000, width = 4, includeIOF = false)) }) // DOC include end: gpio config fragment/** * Config fragment for removing all UART peripheral devices from the SoC */ class WithNoUART extends Config((site, here, up) => { ...
def trySuccessfulConf(requestedFreqs: Seq[Double], expected: Double): Unit = { val freqStr = requestedFreqs.mkString(", ") it should s"select a reference of ${expected} MHz for ${freqStr} MHz" in { it should s"select a reference of ${expected} MHz for ${freqStr} MHz" in { ...
def apply(th: HasHarnessInstantiators, chips: Seq[LazyModule])(implicit p: Parameters): Unit = { Seq.tabulate(chips.size, chips.size) { case (i, j) => if (i != j) { (chips(i), chips(j)) match { case (l0: HasIOBinders, l1: HasIOBinders) => p(MultiHarnessBinders(i, ...
lazy val commonSettings = Seq( organization := "edu.berkeley.cs", version := "1.6", scalaVersion := "2.13.10", assembly / test := {}, assembly / assemblyMergeStrategy := { _ match { case PathList("META-INF", "MANIFEST.MF") => MergeStrategy.discard case _ => MergeStrategy.first...