🔧 Verilog plugin for Sublime Text 2/3. It helps to generate a simple testbench, instantiate a module, insert a user-header, repeat codes with formatted incremental/decremental numbers, etc. - poucotm/Verilog-Gadget
I'm trying to write a simple counter using Verilog on Quartus Prime and a testbench in Verilog being tested with Questa FPGA modelSim. The goal of my counter is to count up to 7 at positive edge of a clock cycle and wrap back to 0 after 7 or if the low assert reset signal is ass...