GUEST EDITORIAL: POWER MODELING, ESTIMATION AND OPTIMIZATION IN VLSI SYSTEMSELECTRONIC apparatus & appliancesELECTRIC powerPlease refer to full text.doi:10.1142/S0218126602000628NoneWorld Scientific Publishing CompanyJournal of Circuits Systems & Computers...
Guest Editorial: Power Modeling, Estimation and Optimization in VLSI Systems.Please refer to full text.MarculescuRaduJournal of Circuits, Systems & Computers
Ye Y, Borkar S, De V (1998) A new technique for standby leakage reduction in high-performance circuits. In: Proceedings of the 1998 symposium on VLSI circuits, Honolulu, HI, pp 40–41 About this Article Title Modeling leakage power reduction in VLSI as optimization problems Journal Opti...
摘要: Silicon area, performance, and testability have been, so far, the major design constraints to be met during the development of digital very-large-scale-integration (VLSI) systems. In recent years, ...会议时间: 2006-11-01 主办单位: IEEE Press PUB767 Piscataway, NJ, USA ...
nor in VLSI courses. With the growing demand in the industry for expertise in this area, there ...
Modeling Energy-Time Trade-Offs in VLSI Computation The performance of today's computers is limited primarily by power consumption rather than the number of instructions executed. Because the energy required... BD Bingham,MR Greenstreet - 《Computers IEEE Transactions on》 被引量: 0发表: 2012年 ...
Some power modeling techniques for system components provide "local" tradeoffs between power estimation accuracy and computational cost. This work addresses a complementary problem — the optimized integration and usage of heterogeneous component power models within a system-level simulation framework. We ...
Low-Power Digital VLSI Design: Circuits and Systems addresses both process technologies and device modeling. Power dissipation in CMOS circuits, several practical circuit examples, and low-power techniques are discussed. Low-voltage issues for digital CMOS and BiCMOS circuits are emphasized. The book ...
In this paper, we describe the integrated power, area and thermal modeling framework in the structural simulation toolkit (SST) for large-scale high perfor... MY Hsieh,R Riesen,K Thompson,... - 《Computer Journal》 被引量: 11发表: 2012年 [IEEE 2015 IEEE/ACM International Conference on Com...
consumptionofVLSIdesigns. AnumberofCADtechniqueshavebeenproposedforgate-levelpowerestimation(see[1]for asurvey).However,bythetimethedesignhasbeenspecifieddowntothegatelevel,itmaybe toolateortooexpensivetogobackandfixhighpowerproblems.Henceinordertoavoidcostly ...