Advance hardware architecture of SoC design is proposed with very large scale integration (VLSI) technology to improve video delivery to end users. 4.1 Scalable video coding Scalable video coding [7] has been p
Shortest paths computations are used as subroutines in solution procedure for computational biology (DNA sequence alignment [44], VLSI design [8], knapsack packing problems =-=[18]-=-, travelling salesman problems [24] and for many other problems. A diverse set of shortest path models and ...
Such a well-known and long-studied problem arises in many different domains, such as road networks, routing protocols, artificial intelligence, social networks, data mining, and VLSI chip layout. The de facto reference approaches to SSSP are the Dijkstra [34] and Bellman-Ford [35, 36] ...
identify the combinations of antennas that need to be activated in order construct the desired signal at the receiver. In Oscar Castarieda, et al., “1-bit Massive MU-MIMO Precoding in VLSI”, arXiv:1702.03449, two low complexity schemes and corresponding VLSI implementation with high throughput...
(VLSI), or another suitable construction. Other alternatives include a digital signal processing chip (DSP), discrete circuitry (such as resistors, capacitors, diodes, inductors, and transistors), field programmable gate array (FPGA), programmable logic array (PLA), programmable logic device (PLD),...
This survey presents the rich history of the Welch-Gong (WG) Stream cipher family. It has been a long journey that lead the WG stream ciphers to become pra
However, the direct management team also participates in forming the safety management system together with the mine-level management authority. Because the responsibilities of the two groups overlap, unsafe acts often result, so they are analyzed together. The mine-level management staff is organized...
Therefore, we can only use statistics to predict the typical behavior of groups of parts. These predictions, and the methods they are based on, are documented in FIT reports. The FIT report is based on process specific data and is derated to reflect individual device characteristics. FIT ...
Grouping registers into register files for efficiently implementing large VLSI chips, based on multiport memories, is being used in the design of many high-speed RISC and superscalar processors. An efficient design methodology for grouping variables into multiport memories, which is an essential step...
and idle randomization including conversion of one or more media independent interface characters into code-groups, andwherein the PCS resources include a transmit heartbeat controller module which manages flow control to the MAC resources in order to maintain a transmit data rate of the data path ...