Low Power Pass-Transistor Logic and Application Examples - Taki, Lee - 1997 () Citation Context ...rious kind of pass-transistor logics have been proposed, including CPL (Complementary Pass-transistor Logic), LEAP (LEAn integration with Pass-transistors), and SPL (Single-rail Pass-transistor ...
1) pass transistor logic 传输管逻辑 1. In addition,pass transistor logicis used widely because it is a high speed,low p. 另外,在电路设计中大量使用传输管逻辑,提高速度并降低整个电路的面积和功耗。 2) double pass-transistor logic 双传输管逻辑 ...
vlsi circuit design 04 pass transistor logic VLSICircuitsDesignPassTransistorLogic WangYong-sheng yswang@hit.edu.cn HarbinInstituteofTechnologyMicroelectronicsCenter Review:StaticComplementaryCMOSHITMicroelectronics Highnoisemargins VOHandVOLareatVDDandGND,respectivelyVDD Lowoutputimpedance,high In1 inputimpedance In...
网络通道晶体管逻辑;传输逻辑;传输管电路 网络释义
This paper describes a dedicated logicsynthesis system for a new pass-transistor logic SPLwhich we have proposed for a highly power consciousmobile computing use. SPL has special twofeatures that are the use of a long series of NMOSpass-transistors without intermediate buers and its\\single-rail...
The pass-transistor mapper (PTM) is reported; this is a logic synthesis tool specifically designed for pass-transistor-based logic library that has only three basic cells. It exploits the close relationship between a binary decision diagram (BDD) representation of logic and the structure of pass-...
Recently reported logic style comparisons based on full-adder circuits claimed complementary pass-transistor logic (CPL) to be much more power-efficient than complementary CMOS. However, new comparisons performed on more efficient CMOS circuit realizations and a wider range of different logic cells, as...
SPL (Single-rail Pass-transistor Logic) is one of the most promising logic styles for low power circuits. This paper examines some key issues in the implementation of SPL: swing restoration, optimum number of pass-transistor stages between buffers and SPL circuits with two supply voltages. Simula...
Pass-transistor logic design - Al-Assadi, Jayasumana, et al. - 1991 () Citation Context ... will be independent of the ratio of pullup and pull-down transistor sizes. Because of this, CMOS complementary logic does not have to worry about signal degradation problems in pass-transistor logic...
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