Based on the single-mode design, the revised test chip is able to support multi-mode t=24, 48, 60, 72 error correcting capability with reduced 124.7K gate-count based on the implementation results under 90 nm CMOS technology. Moreover, it is proved that all presented BCH codec designs ...
Sometimes we have a tendency to make things more complicated than they need to be. All we have to do in this case is remember that an AND gate is really formed from a NAND gate followed by a NOT gate (similarly, an OR gate consists of a NOR gate followed by a NOT gate). This me...