You are correct you don’t need the clocks in the modport, you have them in the clocking block and your reference should be to the clocking block. The most important thing when sending around virtual ports is to ensure that you are referencing the correct types. That is when you construct...
在Verilog中,modport是一种用于定义模块接口的概念。它允许我们在模块级别上指定不同的接口视图,以便在模块实例化时传递给其他模块。 modport可以用于定义输入输出端口的方向和信号类型。通过使用modport,我们可以在模块级别上定义多个接口视图,以便在实例化时选择适当的视图。 在将生成的modport传递给同一模块的实例...