Effect of nitric oxide annealing on the interface trap densities near the band edges in the 4H polytype of silicon carbide Results of capacitance–voltage measurements are reported for metal–oxide–semiconductor capacitors fabricated using the 4H polytype of silicon carbide do... GY Chung,CC Tin,...
By means of capacitance-voltage and thermal dielectric relaxation current measurements, the interface properties have been investigated. Whereas for the samples with an interfacialSiO2layer the highest near-interface trap density is found at0.3eVbelow the conduction band edgeEc, the samples with only ...
Accumulation capacitances exceed 3 mu F/cm(2) at 1 MHz on n-type In0.53Ga0.47As. Complementary studies of interface chemistry and surface morphology using transmission electron microscopy, x-ray photoelectron spectroscopy, and secondary ion mass spectrometry as a function of surface cleaning ...
We report the effects of Si interlayer on the capacitance-voltage (C─V) characteristics of Si3N4/Si/n-GaAs metal-insulator-semiconductor (MIS) capacitor as a function of interfacial Si thickness, Si growth temperature and post-growth annealing. The thickness of interfacial Si was found to be...
A new technique called MOS constan t current quasistatic small-signal technique is given. Using this technique the quasistatic capacitance, high frequency capaeitanee and semiconductor surface potential of MOS capacitor can be measured simultaneously, and the low interface state distribution of Si/SiO2...
HfO2/GeOxNy/Ge gate stacks with sub-nanometer capacitance equivalent thickness and low interface trap density by in situ NH3 plasma pretreatment The native oxides on Ge substrates can be transfor Chen,Jun,Liu,... - 《Applied Surface Science A Journal Devoted to the Properties of Interfaces in ...
where VTO is the trap-free threshold-voltage value, Cox is the gate-oxide capacitance per unit area, and q is the electron charge. The density of inversion-layer electrons in the absence of carrier trapping is shown by the grey line in Fig. 1; this corresponds to the theoretical case of...
Since the width of inversion layer is proportional to ϕB−V, the capacitance becomes proportional to 1/ϕB−V, from which ϕB is determined. Because the capacitance also includes effects of tunneling currents, resistance in semiconductors, and distribution of impurity atoms, the analysis ...
Qin et al., used a hybrid phototransistor based on monolayer graphene on top of single-walled carbon nanotubes (SWNTs) on a \({\mathrm{SiO}}_{2}/\mathrm{Si}\) substrate for optoelectronic synaptic device, the physical mechanism behind the operation being the interface trap between graphene...
Insertion of a 2 nm thick Al2O3 interlayer greatly decreases the trap density of the insulator/GaN interface, and reduces the voltage hysteresis and ... M.,A.,Negara,... - 《Acs Applied Materials & Interfaces》 被引量: 9发表: 2016年 High-frequency capacitance–voltage measurement of plasm...