Interrupt nesting behavior configuration. This is explained here: http://www.freertos.org/a00110.html Priorities are controlled by two macros: - configKERNEL_INTERRUPT_PRIORITY determines the priority of the RTOS daemon task - configMAX_API_CALL_INTERRUPT_PRIORITY dictates the priority of ISRs that...
Consider the architecture and memory areas of the specific i.MX-based SoC as explained in the articleCortex-M and Memory Areas Overview on Toradex SoMs The NXP/Freescale i.MX 7 SoC which is the core of the Colibri iMX7 module implements a heterogeneous asymmetric architecture. Besides the main...
As it has already been explained, you are seeing empty folders and other problems because you did not install RTD package of the compatible version or did it in a wrong way. Please do follow the suggestions in my previous post in this thread to uninstall conflicting...
This section explains the ModusToolbox™ software resources and their configuration as used in this code example. Note that all the configuration explained in this section has already been done in the code example. Device configurator:ModusToolbox™ software stores the device configuration settings...
This section explains the ModusToolbox™ resources and their configurations as used in this code example. Note that all the configurations explained in this section have already been implemented in the code example. Device Configurator:ModusToolbox™ stores the configuration settings of the applicati...
Complete Code This is the complete code that we are using for which we explained the parts relating to FreeRTOS Queue. #include <stdio.h> #include <freertos/FreeRTOS.h> #include <freertos/task.h> #include "freertos/queue.h" TaskHandle_t myTaskHandle = NULL; ...
To the best of our knowledge, this is the first code-level verification of memory safety and functional correctness properties of the FreeRTOS scheduler. The outcome of our experiment confirms that Hip/Sleek can indeed be used to verify code that is used in production. Moreover, since the ...
3 Implement FreeRTOS tickless mode on LPC5500 In Chapter 2, the principle of the FreeRTOS tickless mode is explained based on the source code of FreeRTOS. This chapter describes how to implement the tickless mode on the LPC5500 platform. NXP SDK provides a freertos_tickless example for ...
As you explained, Enter_Critical on Cortex-M0 actually disabled all interrupts, this certainly increased the latency of interrupt response, and give no chance to get rid of it, for event an ISR doesn’t invoke Kernel_API_FromISR. This could be a big impact to an engineering work in the ...
In this guide, the flashprog operation uses the flashprog.py script to flash the NAND of the board, as explained below. Similarly, the ramload operation uses the ramload.py script to copy the firmware image from the host directly to the RAM of the microcontroller, without flashing the ...