运行到 EMACPHYConfigSet(EMAC0_BASE,(EMAC_PHY_TYPE_INTERNAL |EMAC_PHY_INT_MDIX_EN | EMAC_PHY_AN_100B_T_FULL_DUPLEX));时进入死循环,进入后发现总是在这个while while(!SysCtlPeripheralReady(SYSCTL_PERIPH_EPHY0)) { // // Wait for the PHY reset to complete. // }...
memset(config, 0, sizeof(enet_config_t)); /* Sets MII mode, full duplex, 100Mbps for MAC and PHY data interface. */#if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB config->miiMode = kENET_RgmiiMode;#else config->miiMode = kENET_MiiMode;//kENET_RmiiMode;#endi...
ETH MCUX driver is unmaintainable and cannot support a PHY other than the one on some of the NXP EVKs. Redo, planning to deprecate old driver but keep for a release or two. New driver selects EXPERIMENTAL until the community has had a chance to try this new driver. This PR also ...
"#define MCAST_ADDRx YY") - intializes the Tx and the Rx descriptors - initializes the PHY device Pointer to structure of type ENET_MACCOnfig (see below) None None None ENET_MIIWriteReg ENET_RxDscrInit ENET_Tx_DscrInit ENET_MACConfig structure The ENET_MACConfig structure is defined...
Can you access PHY's MDIO registers in u-boot? If you cannot access MDIO bus for the PHY, please: Add in defconfig a micrel config. Remove FEC define and modify EQOS define to 4, I think it's your case; in include/configs. And of course u-boot's device tree as ...
intboard_eth_init(bd_t*bis){uint32_tbase = IMX_FEC_BASE;structmii_dev*bus=NULL;structphy_device*phydev=NULL;intret;setup_iomux_enet();#ifdefCONFIG_FEC_MXCbus = fec_get_miibus(base,-1);if(!bus)return0;/* scan phy 4,5,6,7 */phydev = phy_find_by_mask(bus, (0xf<<4), ...
cpsw-3g: init config Mdio_open: MDIO Manual_Mode enabled cpsw-3g: Open port 1 EnetPhy_bindDriver: PHY 3: OUI:080028 Model:0f Ver:01 <-> 'dp83869' : OK PHY 3 is alive PHY 15 is alive Attach core id 1 on all peripherals
| | |structfec_info_s fec_info[] = { <---+ | |{| | |0,/*index*/| | |CONFIG_FEC0_IOBASE,/*io base*/---+-*---*-*-+CONFIG_FEC0_PHY_ADDR,/*phy_addr*/| | | | |0,/*duplex and speed*/| | | | |0,/*phy name*/| | | | |0,/*phyname init*/| | | |...
EnetPhy_bindDriver:1718 PHY 0 is alive Starting lwIP, local interface IP is dhcp-enabled Host MAC address-0 : f4:84:4c:fc:33:80 [LWIPIF_LWIP] NETIF INIT SUCCESS Enet IF UP Event. Local interface IP:0.0.0.0 Cpsw_handleLinkUp:1323 MAC Port 1: link up Net...
ENET: Ethernet MAC Driver {EthernetMACDriver} Operations of Ethernet MAC Driver MII interface Operation The MII interface is the interface connected with MAC and PHY. the Serial management interface - MII management interface should be set before any access to the external PHY chip register. CallE...