In its initial version, TaPaSCo employed a software runtime to dispatch a task to a suitable, currently idle PE. Recently, TaPaSCo was sped-up by moving part of this dispatching process from software to hardware. The resulting Cascabel extension [5] employs a hardware queue, which accepts the...
(“Providing QOS Guaranteed in a NOC by Virtual Channel Reservation”); 2006; pp. 1-12. Monchiero (“Exploration of Distributed Shared Memory Architecture of NOC-Based Microprocessors”, 2007) pp. 1-8. Al-Hashimi; (“System-on-Chip—Net Generation Electronics”, “Asynchronous on-chip ...
In one embodiment, an instruction queue (not shown) is imposed between the decode unit 206 and the instruction issue unit 208 for buffering instructions awaiting issue to the execution units 212 for reducing the likelihood of starvation of the execution units 212. In one embodiment, the various ...