Calibration techniques can be applied to measure and correct for such error in an SAR ADC using decide-and-set switching. Specifically, a calibration technique can expose the effective bit weight of each bit under test using a plurality of special input voltages and storing a calibration word ...
This article presents a comprehensive review of timing skew and its calibration techniques in time-interleaved ADCs. It covers the fundamentals of time interleaving, the principle of timing skew, and general considerations of timing-skew calibration. Moreover, it categorizes existing calibration ...
CALIBRATION TECHNIQUES FOR SAR ADCS WITH ON-CHIP RESERVOIR CAPACITORS 机译:带有片上储层电容器的SAR ADC的校准技术 摘要 When reservoir capacitors are moved on-chip for individual bit decisions, a successive approximation register analog-to-digital converter (SAR ADC) has an addition source of error ...
In this way timing skews between interleaved units are less critical. This is the approach taken with City Semiconductor’s current Gigasample-per-second (GS/s) family of ADCs. In the below example diagram, only the clock going to the “TH” block is critical. All other clocks are not ...
Yavari, ”A Calibration Technique for Pipelined ADCs Using Self-Measurement and Histogram-Based Test Methods,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 62, no. 9, pp. 826-830, Sept. 2015. [18] R. Holcer, L. Michaeli and J. Saliga, ”DNL ADC testing ...
逐次逼近型模数转换器中的失配校准技术 mismatch calibration techniques in successive approximation analog-to-digital converters.pdf,第28卷第9期 半导体学报 V01.28No.9 CHINESEJOURNALOF 2007年9月 SEMICONDUCTORS Sep.。2007 MismatchCalibration inSuccess
Low-power high-performance SAR ADC design with digital calibration techniques This dissertation presents the design of three high-performance successive-approximation-register (SAR) analog-to-digital converters (ADCs) using distinct ... W Liu 被引量: 6发表: 2011年 A 12 bit 40 MSPS SAR ADC with...
Time interleaving is one of the most efficient techniques employed in the design of high-speed sampled-data systems. However, the mismatches appearing amon... Sai-Weng Sin,,Chio, U.-F,U Seng-Pan,... - 《IEEE Transactions on Circuits & Systems II Express Briefs》 被引量: 40发表: 2008年...
implementedinCMOStechnologies,whichcanbemitigated bydigitalcalibration.Digita1calibrationtechniqueshavebeen provedtobeefi cientforpipelineADCsl2—41.foldingandin— terpolationADCSDJinperformanceimprovement. Thispaperproposesadigitalcalibrationtechniquefor anultrahigh.speedwidebandwidthfoldingandinterpolation ADCfF&IADC)....
3. Digital Calibration Techniques for Capacitor Mismatch - Description of Capacitor Mismatch Issues in SAR ADCs - Methods for Addressing Capacitor Mismatch in Digital Calibration - Case Studies of Digital Calibration Techniques for Capacitor Mismatch 4. High-Resolution SAR ADC with Sub-2 Radix Architectu...