xlnx,ptp-enet-clock = ; mdio { #address-cells = ; #size-cells = ; phy@0 { compatible = "marvell,88e1111"; device_type = "ethernet-phy"; reg = ; linux,phandle = ; phandle = ; }; }; }; 当对dts修改完成后,再次使用dtc工具编译产生devicetree.dtb即可 五、文件系统设置 文件系统一般...
tri mode Ethernet MAC在100Mbps 时可以使用MAC 接口,可以通过一个MAC to RMII 的IP 转换成为RMII 接口。 IEEE1588/PTP实现方案 IEEE1588 的硬件实现的方法有两种: 在MAC控制器中实现 在Phy 芯片中实现,比较常见的有TI 公司的DP83640 芯片 ZYNQ 中实现IEEE1588 协议的方式 笔者做了一些厂商,在PL 端使用现成的...
需中断信号连到PS 4.非易失存储器(可选),如:QSPI Flash,SD/MMC 5.以太网接口(可选),若用IP核或外部PHY的话,需中断信号连到PS 本文硬件上,将在ZYNQ Processing system里启用TTC、UART、SD以及之后可能用到的USB、Ethernet(网口0在bank1,bank1电压要选1.8V,否则报错)...
device_type = "ethernet-phy"; }; }; pcw.dtsi: &gem0 { phy-handle = <&phy0>; phy-mode = "gmii"; status = "okay"; xlnx,ptp-enet-clock = <0x69f6bcb>; ps7_ethernet_0_mdio: mdio { #address-cells = <1>; #size-cells = <0>; gmii_to_rgmii_0: gmii_to_rgmii_0@8 { ...
enet-reset = <&gpio0 9 0>; phy-mode = "rgmii-id"; status = "okay"; xlnx,ptp-enet-clock = <0x6750918>; }; &gpio0 { emio-gpio-width = <64>; gpio-mask-high = <0x0>; gpio-mask-low = <0x5600>; }; &i2c0 { clock-frequency = <400000>; status = "okay"; }; &intc ...
xlnx,ptp-enet-clock = <0x69f6bcb>; mdio { #address-cells = <0x1>; #size-cells = <0x0>; phy@0 { compatible = "marvell,88e1111"; device_type = "ethernet-phy"; reg = <0x0>; linux,phandle = <0x7>; phandle = <0x7>; ...
This driver supports the xilinx AXI 1G/2.5G, 10 Gigabit,10G/25G High Speed and usxgmII Ethernet Subsystem. config XILINX AXI EMAC HWTSTAMP bool "Generate hardware packet timestamps" depends on XILINX AXI EMAC select PTP_1588_CLOCK default n ---help--. Generate hardware packet timestamps. ...
建议先ping一下本机的IP及网关
eth0: ethernet@e000b000 Hit any key to stop autoboot: 0 Device: mmc@e0100000 Manufacturer ID...
Out: serial@ff010000 Err: serial@ff010000 Bootmode: SD_MODE Reset reason: EXTERNAL Net: No ethernet found. Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot.scr ...