系统启动后先加载FPGA,然后加载驱动。手动加载驱动的方法见上一条博客。 4. AXI Ethernet默认不支持fixed-link模式,加载驱动的时候报错Connection timed out,跟踪发现是axienet_open函数里有访问MDIO的函数调用返回失败,手动屏蔽MDIO的访问函数后重新编译加载驱动没有出现再报错的情况:...
&axi_ethernet_1 { local-mac-address = [00 0a 35 00 22 02];xlnx,phy-type = <0x8>;phy-...
eth0: ethernet@e000b000 Hit any key to stop autoboot: 0 Copying Linux from QSPI flash to ...
you seem to have removed the DDR in your design. I'm not sure why the FSBL absolutely requires the DDR, but I guess without external memory, and only the internal cache, you won't run far with a Cortex A9 processor.
size4KiB, total32MiB *** Warning - bad CRC, using default environment In: serial@e0001000 Out: serial@e0001000 Err: serial@e0001000 Net: ZYNQ GEM: e000b000, mdio bus e000b000, phyaddr -1, interface rgmii-id Warning: ethernet@e000b000 using MAC address from DT eth0: ethernet@e000b...
Vote 0 Link pynqz2_axistream.zip Reporting back. I finally found the error and got the axistream example working on the pynq-z2 SoC. TLDR: The problem was a faulty reference design. Multichannel dmas are not supported anym...
this app is using lwip for fast RAW ethernet connection. i tested this standalone bare-metal application for a long time and it works pretty got. in kombination with petalinux on core 0 i have the problem, that i dont receive a "connected callback" from lwip and so i got no ...
Ethernet GFC GTY Quad GTH Quad DDRC (DDR4/3/3L, LPDDR3/4) To ACP VCU H.264/H.265 PCIe Gen4 32-bit/64-bit M 64-bit M => AXI Master SM 128-bit S => AXI Slave S X23704-021320 UG1137 (v2021.2) October 27, 2021 Zynq UltraScale+ MPSoC: Software Developers Guide Send Feed...
Linux Kernel 4.4 DTS node for Xilinx AXI-DMA IP. July 1, 2016 GitHub's introducing unlimited private repositories!!! May 11, 2016 Xilinx Vivado HLx WebPACK edition. February 19, 2016 HowTo use Eclipse with CDT to develop and cross-compile(for ARM) Linux kernel module. January 6, 20...
The FPGA currently has a specialized SPI master interface that is accessed via the PCIe to AXI bridge, this is being replaced by the MicroBlaze and the shared memory (plus a few other bits). Same Kintex FPGA has 5 GB Ethernet MACs, a heap of UARTs, and a number of other application ...