>> X86_PF_PROT = 1 << 0, >> @@ -21,6 +22,7 @@ enum x86_pf_error_code { >> X86_PF_INSTR = 1 << 4, >> X86_PF_PK = 1 << 5, >> X86_PF_SGX = 1 << 15, >> + X86_PF_RMP = 1ull << 31, >> }; > Man, I hope AMD and Intel ar