State coupling faults, word-orientedmemories, tests, data backgrounds, m-out-of-n codes.Most industrial memories have an external word-width of more than one bit.However, most published memory test algorithms assume 1-bit memories; they will not detect coupling faults between the cells of a ...
A novel single-error-correction (SEC) code is proposed in order to test various fault models simultaneously in both data bit and check bit arrays for word-oriented memories (WOMs). Simultaneous testing of data bit and check bit arrays eliminates the test time and hardware overheads required for...
摘要: Describes a systematic method for modifying march tests for bit-oriented memories into tests for word-oriented memories. Distinction between interword and intraword faults; Concatenation to the test for interword faults; Complete coverage of targeted faults....
2) register file memories 单向双端口静态存储器3) dual-port RAM 双端口静态存储器4) multi-port SRAM 多端口静态存储器 1. Especially hard real-time system,it firstly puts forword parallel RAM real-time network based on multi-port SRAM and multi-port transeiver whose best characte. 特别是...
Transparent test is one of useful technique for improving the reliability of memories during life time. This paper presents a systematic algorithm used for transforming a bit-oriented march test into a transparent word-oriented march test. The transformed transparent march test has shorter test ...
By performing the must-repair analysis during the test, it selectively stores fault addresses, and the final analysis to find a solution is performed on the stored fault addresses. The infrastructure is also extended to support various types of word-oriented memories.O.Vignesh...
This approach results in more efficient tests with complete coverage of the targeted faults. Word-oriented memory tests are very important, because most memories have an external data path which is wider than one bit. 展开 关键词: ieee computer society ...
memory core testprogrammable wrapperIn today's embedded technology, memories are the universal components. With the onset of the deep-submicron VLSI technology, the density and capacity of the memory are growing. However, providing a cost-effective test solution for these on-chip memories is ...
The memory required to store the fault addresses is dominated by total area of our infrastructure. It grows quadratically with respect to the number of repair elements. This architecture also to support various types of word- oriented memories.Mulagundla LaxmiB.ShivakumarM. Swetha...
bira for word oriented memories using parallel prefix algorithm.C. BhaskarK. Jeyaprakasam