For example, closed loop control may be used to determine a control profile for a chemical mechanical planarization process to more uniformly and consistently achieve the desired extent of variation of within wafer uniformity of a semiconductor wafer.doi:US20140015107Ching-Kun ChenChun-Fu ChenChin-Ta SuUS20140015107 * Jul 12, 2012 Jan 16, 2...
wafer uniformity是晶片均匀性，区别在于across是跨越，横跨的意思，withing则是在什么范围内
(ILD) of a wafer;a controller for determining a polish recipe using the thickness profile, wherein the polish recipe is configured to substantially compensate for a non-uniformity of the thickness profile;a high-rate CMP platen configured to perform a high-rate CMP process on the ILD using ...
A retainer ring structure was investigated to improve non-uniformity in a chemical mechanical planarization (CMP) process. During the CMP process, the stress distribution on the wafer affects the CMP performance in terms of material removal rate (MRR) and within-wafer non-uniformity (WIWNU). The...
It is getting more important to monitor all aspects of influencing parameters in critical etch steps and utilize them as tuning knobs for within-wafer uniformity improvement and wafer edge yield enhancement. Meanwhile, we took a dive in pursuing "measuring what matters" and challenged ourselves for...
Wafer-Scale CMP Modeling of Within Wafer Non-UniformityJianfeng Luo
Pad Surface Characteristics and their Effect on Within Wafer Non-Uniformity in Chemical Mechanical PolishingJeong, Haedo
(1996), "A Robust Metric for Measuring Within-Wafer Uniformity." IEEE Transactions on Components, Packaging, and Manufacturing Technology, Part C, Vol. 19, 283- 289.J. C. Davis, R. S. Gyurcsik, J. C. Lu, and J. M. Hughes-Oliver, "Robust Metric for Measuring Within-Wafer Uniformity...
Methods for improving within-wafer uniformity of gate oxideChen ChiChunWang MingFangChen ShihChang
(1) Utilize manufacturing consistency of thermal impedance and ambient temperature uniformity to enable open-loop control of the laser wavelength based on a 1-time programmed on-chip e-fuse array (such as the memory array 1225) and based on self-testable parameters in a verification test (i.e...