To record the electrical activity of different regions of the heart and manage the signals generated for long-term monitoring, a compression algorithm is necessary. This letter presents a novel compressor and decompressor able to support 3-lead compression without increasing hardware costs and area. ...
In this letter we propose a high-throughput VLSI architecture design for H.264 high-profile context-based adaptive binary arithmatic coding (HP CABAC) deco... YC Yang,JI Guo - 《IEEE Transactions on Circuits & Systems for Video Technology》 被引量: 79发表: 2009年 Variable-Bin-Rate CABAC En...
IEEE Proceedings of Circuits, Devices... Frequency analysis using DFT (discrete Fourier transform) or its faster computational technique (FFT) is an obvious choice for the entire image and signal ... KC Ray,AS Dhar - IEE Proceedings - Circuits Devices and Systems 被引量: 19发表: 2007年 ...
and Despain, A.M., “Design Decisions Influencing the Micoarchitecture for a Prolog Machine”, ACM SIG MICRO News Letter, Vol. 15, No. 4, pp. 217–231, 1984. Faign, B. et al. “Compiling Prolog Into Microcode: A Case Study Using the NCR/32–000”, ACM SIG MICRO News Letter, ...
letter "X's" represent a binary number to provide the desired division ratio. The two binary positions to the right of the decimal point constitute the inputs "LSB" on lead 17 and "ADJUST" on lead 18, as described above. These are binary decimal places designating one-half and one-...
Kershaw and M. Sandler "Sigma-Delta bitstream filtering in VLSI", Proc. 37th Midw. Symp. Circuits Syst. , pp.1200 -1203 1994S. Summerfield, S. Kershaw, M. Sandler, "Sigma-Delta bit-stream filtering in VLSI", In: The 37th Midwest Symposium on Circuits and Systems, August ...
Division of Circuits and SystemsK. T. LAUDivision of Circuits and SystemsJournal of Circuits, Systems and ComputersNg, K.W. and K.T. Lau, 1999. An adiabatic 4-2 compressor design for low power VLSI. J. Circ. Syst. Comput., 9: 339-339. DOI: 10.1142/S021812669900027X...
Journal of Circuits Systems & ComputersK. W. Ng,K. T. Lau.An adiabatic 4-2 compressor design for low power VLSI. Journal of Circuits Systems and Computers . 1999Ng, K.W. and K.T. Lau, 1999. An adiabatic 4-2 compressor design for low power VLSI. J. Circ. Syst. Comput., 9: ...
K. Paramasivam, Dr.K.Gunavathi, ―Reordering Algorithm For Minimizing Test Power In Vlsi Circuits‖, Engineering 14:1, El_14_1_15, February 2009.K.Paramasivam, ‖Reordering Algorithm For Minimizing Test Power In Vlsi Circuits‖, Engineering Letter,...
In this letter we propose a high-throughput VLSI architecture design for H.264 high-profile context-based adaptive binary arithmatic coding (HP CABAC) deco... YC Yang,JI Guo - 《IEEE Transactions on Circuits & Syst...