V4L2_MBUS_PCLK_SAMPLE_RISING:在PIXCLK的上升沿采样数据。 V4L2_MBUS_MASTER:设备工作在Master模式。 V4L2_MBUS_VSYNC_ACTIVE_HIGH:VSYNC信号在高电平时有效。 V4L2_MBUS_HSYNC_ACTIVE_HIGH:HSYNC信号在高电平时有效。 V4L2_MBUS_DATA_ACTIVE_HIGH:数据线在高电平时有效。 ov2640_init_cfg函数中,似乎没有相...
interrupt-names = "csi-intr1", "csi-intr2"; clocks = <&cru PCLK_CSI_HOST_2>; clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSI_HOST_2>, <&cru SRST_CSIHOST2_VICAP>; reset-names = "srst_csihost_p", "srst_csihost_vicap"; status = "disabled"; }; &mipi2_csi2 ...
Provide feedback We read every piece of feedback, and take your input very seriously. Include my email address so I can be contacted Cancel Submit feedback Saved searches Use saved searches to filter your results more quickly Cancel Create saved search Sign in Sign up {...