(1.2) uvm_reg_map的do_write任务会查看系统是否设置了adapter,如果没有设置,就直接启动sequence, 让sequencer发送uvm_reg_item类型的transaction;如果设置了,那就调用do_bus_write任务. (1.3) uvm_reg_map的do_write完成后,如果auto predict功能打开了, uvm_reg的do_write会根据写入的值更新register model中寄存器...
uvm自建的针对reg的sequence,针对普通的reg有:reg_access_seq,reg_bit_bash_seq,reg_hw_reset_seq。 uvm_reg model,主要实现了 1) 增加了对dut的reg进行访问的方式,可以直接通过reg model进行访问。传统的只能是通过sequence,启动在bus的sequencer上来实现。 2) 方便了对dut reg进行测试的方法,通过build-in sequ...
`uvm_error(get_full_name(),"Cannot get() an indirect data access register");return0; endfunctionvirtualfunction uvm_reg get_indirect_reg(stringfname ="",intlineno =0);intunsigned idx =m_idx.get_mirrored_value();return(m_tbl[idx]); endfunctionvirtualfunction bit needs_update();return0;...
1taskuvm_reg_map::do_write(uvm_reg_item rw);23uvm_sequence_base tmp_parent_seq;4uvm_reg_map system_map =get_root_map();5uvm_reg_adapter adapter =system_map.get_adapter();6uvm_sequencer_base sequencer =system_map.get_sequencer();78if(adapter !=null&& adapter.parent_sequence !=null)...
1taskuvm_reg_map::do_write(uvm_reg_item rw);23uvm_sequence_base tmp_parent_seq;4uvm_reg_map system_map =get_root_map();5uvm_reg_adapter adapter =system_map.get_adapter();6uvm_sequencer_base sequencer =system_map.get_sequencer();78if(adapter !=null&& adapter.parent_sequence !=null...