A microprocessor of the superscalar pipelined type, having speculative execution capability, is disclosed. Speculative execution is under the control of a fetch unit having a branch target buffer and a return address stack, each having multiple entries. Each entry includes an address value ...
Maxim's DS1232 MicroMonitor chip is a highly integrated solution to add power-on reset delay, a pushbutton reset controller, robust power failure monitoring, and watchdog timer functionality to your microprocessor system with the addition of a single chip. The chip...
created within the original function nestedpar(). T-entry __nestedpar_par_region0() corresponds to the semantics of the outer parallel region, and the T-entry __nestedpar_par_region1() corresponds to the semantics of the inner parallel region. For the inner parallel region in the routine ...
In addition, status of the resulting value (negative, positive, equal to zero) must be handled separately for multi word calculations, requiring even more time and program code. It is known that an accumulator performs the function of a central register in a microprocessor, and that the ...
A microprocessor of the superscalar pipelined type, having speculative execution capability, is disclosed. Speculative execution is under the control of a fetch unit having a branch target buffer and a return address stack, each having multiple entries. Each entry includes an address value ...
3972024 Programmable microprocessor 1976-07-27 Schroeder et al. 364/200 3958221 Method and apparatus for locating effective operand of an instruction 1976-05-18 Serra et al. 364/200 3839705 DATA PROCESSOR INCLUDING MICROPROGRAM CONTROL MEANS 1974-10-01 Davis et al. 364/200 3689895 MICRO-PROGRAM ...
to a removable, external memory unit having a program memory storing a program to be executed in part by a host processing system, e.g., a video game system, and in part by a programmable microprocessor designed to enhance the high speed graphics processing capabilities of the host system. ...
A fully programmable, graphics microprocessor is disclosed which is designed to be embodied in a removable external memory unit for connection with a host information processing sys
A computer software system is disclosed for facilitating a user's replacement or insertion of devices in a computer server network system. The system allows a user to swap or add peripheral devices wh
3. The memory storage device of claim 2, wherein said first data network is a local area network. 4. The memory storage device of claim 3, wherein said local area network is a fiber distributed data interface ring. 5. The memory storage device of claim 2, wherein said second data...