https://forums.xilinx.com/t5/BRAM-FIFO/Increase-FIFO-Size-in-AXI-UART-16550/m-p/793404#M3579 Hope it helps... Jirka LikeReply htsvn (Member) 9 years ago hi, there is a depth parameter in tx_fifo_block.vhd and rx_fifo_block.vhd in the axi_uart16550 IP. this are being driven fr...
I want to know the UART RX fifo size of i.MX8M nano. From the data sheet I got the below info, RX fifo size is 32 half-word. I'm not clear, whether 32 half-word means 64bytes? Is there a way to re-configure the RX, TX fifo size in device tree or kernel dri...
解決済み: Hi, I want to know the UART RX fifo size of i.MX8M nano. From the data sheet I got the below info, RX fifo size is 32 half-word . I'm not
I want to know the UART RX fifo size of i.MX8M nano. From the data sheet I got the below info, RX fifo size is 32 half-word. I'm not clear, whether 32 half-word means 64bytes? Is there a way to re-configure the RX, TX fifo size in device tree or kernel driv...
I want to know the UART RX fifo size of i.MX8M nano. From the data sheet I got the below info, RX fifo size is 32 half-word. I'm not clear, whether 32 half-word means 64bytes? Is there a way to re-configure the RX, TX fifo size in device tree or kernel driver...