Electrical engineering Defect-oriented fault analysis of a two-D-flip-flop synchronizer and test method for its application UNIVERSITY OF CINCINNATI Wen Ben Jone KimHyoung-KookThis thesis presents defect-oriented fault modeling and analysis of a two-D-flip-flop synchronizer and provides a test ...
3. The data transfer apparatus of claim 2, wherein: said synchronizer circuit of each of said synchronizer stages includes a full-signal set-reset flip flop having a set input receiving said first domain write request signal, a reset input and an output set upon receipt of a write request ...
flip flops are clocked by the clock of the domain to which the signal is being transmitted. Thus, for XY synchronizer 140, flip flop 142 is the input flip flop. Input flip flop 142 is clocked by the X clock and receives signal S(XY) as its input. Flip flops 144 and 146 are, ...
The zero latency synchronizer for synchronizing a signal from a first clock domain to a second clock domain is formed from a clock regenerator circuit and input and output master slave flip flops. The clock regenerator receives a first clock from the first clock domain and a second clock from ...
This thesis presents defect-oriented fault modeling and analysis of a two-D-flip-flop synchronizer and provides a test method for its application circuits. Bridging (open) defects are injected into any possible pair of internal nodes of the synchronizer. Then, HSPICE is used to perform the ...
The third D flip-flop stage in each circuit half also eliminates any signal irregularities generated in the logic circuitry from appearing on the synchronizer output lines. The present invention is self-checking in that any single fault in the input signals or in the synchronizer circuit itself ...
The zero latency synchronizer for synchronizing a signal from a first clock domain to a second clock domain is formed from a clock regenerator circuit and input and output master slave flip flops. The clock regenerator receives a first clock from the first clock domain and a second clock from ...