TRI-STATE INVERTER, D LATCH AND MASTER-SLAVE FLIP-FLOP COMPRISING TFETSTri-state inverter comprisingNavneet GUPTAAdam MAKOSIEJCostin ANGHELAmara AMARA
High-speed tristate inverter The tristate inverter of the present invention includes an input line, an output line, a first transistor for transferring a high signal to the output line, and a second transistor for transferring a low signal to the output line. The t... HV Nguyen - US 被...
A two-transistor tri-state inverter is provided, made from a NMOS dual-gate thin-film transistor (DG-TFT) having a top gate, a back gate, and source/drain regions. A PMOS DG-TFT also has a top gate, a back gate, and S/D regions, and the NMOS first S/D region is connected to...
High-speed tristate inverter 专利名称：High-speed tristate inverter 发明人：Hy V. Nguyen 申请号：US08/101131 申请日：19930802 公开号：US05399925A 公开日：19950321 专利内容由知识产权出版社提供 摘要：The tristate inverter of the present invention includes an input line, an output line, a first ...
averticdl verticdl[translate] a我每天都会改变一个地方 I can change a place every day[translate] aThe tristates labeled A and C receive a low from the inverter and are automatically activated. 被标记A和C的tristates从变换器接受低落和自动地被激活。[translate]...
a我很花心吗 My very stamen[translate] aFotomaska : ano fotomaska : Ano[translate] aThe tristate buffer in the Count Decoder receives a high signal due to its inverter, but is not activated. 三州缓冲在计数译码器接受一个高信号由于它的变换器,但没有被激活。[translate]...
The circuit has a first tri- state inverter for receiving data bits and their components. It includes a first tri-state latch for receiving the data bits and their complements, connected to the output of the first tri-state inverter. It has a second tri-state inverter for receiving the ...
Title:Re: Inverter/Buffer Tri-state? Post by:macboyonJanuary 27, 2015, 01:38:22 pm Back to basics. 7400 (74HC00, 74LS00, 74ACT00, etc.), quad 2-input NAND. The NAND gate is a great building block because it combines two inputs and inverts, giving lots of flexibility. You can...
A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product Based on the proposed structure, traditional C2MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The ... S Kunwar,TS Chandra...
Tri-state circuits are the essential elements in bus organized systems such as high-performance processors, asynchronous transfer mode (ATM) crossbar switches, and programmable logic devices [1–4]. A tri-state gate assumes a high-impedance state in addition to high and low logic levels attained...