Cheng, Chung-kuanZhu, ZhengyongUS7555416 2007年7月12日 2009年6月30日 The Regents Of The University Of California Efficient transistor-level circuit simulationUS7555416 * 2007年7月12日 2009年6月30日 The Regents Of The University Of California Efficient transistor-level circuit simulation...
A tight object code level integration with a commercial high speed transistor-level circuit simulator allows efficient invocation of the simulation... P Kulshreshtha,Robert J. Palermo,M Mortazavi,... - IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Te...
A transistor level shifter circuit constituted by a plurality of PMOS TFT is included. The transistor level shifter circuit primarily includes a conversion circuit, a first amplifier circuit, and a second amplifier circuit. With the simplified circuit arrangement and a smaller quantity of required tra...
In this paper, circuit level analysis of the high frequency and low noise performance of an RF CMOS device with Leff=36 nm is performed using various layout schemes. By using the modeling methodology of interconnect metals and vias, it is found that the gate parasitic capacitance from the inte...
In this paper, we present a novel transistor level implementation of an IQ packet switch, using TSPICE. Our circuit has a regular structure and low transistor count. Our simulation results indicate that the circuit may be used to implement switches working well beyond 1 GHz. 展开 ...
Service area 1:One-stop full range of integrated circuit supporting services;Service area 2:Comprehensive supporting services for capacitors and resistors;Service area 3:Inductor crystal oscillator one-stop full range of supporting services;Service area
Service area 1:One-stop full range of integrated circuit supporting services;Service area 2:Comprehensive supporting services for capacitors and resistors;Service area 3:Inductor crystal oscillator one-stop full range of supporting services;Service area
charge clock activating signal is activated, and the level shifter circuit increases or decreases the voltage levels of the clock signal and inverted clock signal using a battery voltage or a ground voltage, thereby reducing current consumption caused by the increase or decrease in the voltage level...
Efficient transistor-level circuit simulationTechniques for performing circuits with nonlinear circuit components such as transistors based on a two-stage Newton-Raphson approach.doi:WO2006078302 A1Cheng Chung-KuanZhu ZhengyongWO
US7555416 2007年7月12日 2009年6月30日 The Regents Of The University Of California Efficient transistor-level circuit simulationUS7555416 * 2007年7月12日 2009年6月30日 The Regents Of The University Of California Efficient transistor-level circuit simulation...