时序驱动(Timing-Driven)成品。一套新开发的自动化保持时间消除器(Hold Time Eliminator)以及路由器中的改良式延迟预测器, …blog.nownews.com|基于12个网页 2. 时间驱动技术 三、阿凡提的布局与绕线因为在时间驱动技术(Timing-driven)上的优势,继续扩大其市场份额,到二○○一年与凯登斯大致各占市场 …www.techcn...
网络释义 1. 时序驱动设计 材料科学专业英语词汇... ... timing data 时序资料timing driven design时序驱动设计timing driven layout 时序驱动配置 ... www.foodmate.net|基于16个网页
In this paper, timing-driven testability synthesis is first performed on a tree adder. It is shown that the structure of the tree adder provides for a high fanout with an imbalanced tree structure, which likely contributes to a racing effect and increases the delay of the circuit. The timing...
Timing driven codesign techniques are particularly relevant to the design of on-chip microelectronic systems. Accurate modeling and use of timing information at multiple levels of design abstraction is crucial to effective system design for on-chip implementations. Modeling and computer-aided design tools...
The timing-driven maze routing problem is then to find paths which exhibit low resistance-capacitance (RC) delay or achieve a tradeoff between RC delay and total capacitance. An easy-to-implement labeling algorithm is presented to solve the problem along with effective speedup enhancements to the ...
Timing-driven bipartitioning with replication using iterative quadratic programming We present an algorithm for solving a general mm-cut, two-way partitioning problem subject to timing constraints. The problem is formulated as a constrained programming problem and solved in two phases: cut-set minimizati...
文档标签: timingdrivenmazerouting时序驱动maze路由 系统标签: maze时序routingtimingdriven驱动 1,32,1 2,21,1 2,12,1 2 , 2 1 , 3 2 , 1 1 , 3 2 , 2 2 , 1 1 , 1 1 , 2 2 , 1 3 , 1 2 , 1 1,24,13,1 s t 2,2 1,1 s t 4,1 2 , 1 3 , 1 1,2 2,1 1 , 1...
Timing-Driven Global Routing with Efficient Buffer Insertion(VLSI Design Technology and CAD) Timing optimization is an important goal of global routing in deep submicron era. To guarantee the timing performance of the circuit, merely adopting topol... XU,Jingyu,HONG,... - 《Ieice Transactions on...
S. Sapatnekar, "Timing-driven Partitioning and Timing Optimization of Mixed Static- Domino Implementations," IEEE Trans. CAD of ... Min,Zhao,Sapatnekar,... - 《IEEE Transactions on Computer Aided Design of Integrated Circuits & Systems》 被引量: 18发表: 2000年 Timing-Driven Partitioning For...
Timing-driven partial scan 来自 学术范 喜欢 0 阅读量: 72 作者:J Jou,K Cheng 摘要: A partial scan approach that aims to reduce both area overhead and performance degradation caused by test logic is presented. Given a target speed and an initial design that meets the target, the algorithm ...