针对神经前端,我们想要尽可能地低功耗、低面积、低噪声的同时保证高Dynamic range和高输入阻抗(毕竟谁也不想大电流流到自己的脑子)。而传统架构通常由精密放大器(IA)、放混叠滤波器(AAF)和ADC构成。通常来说IA和AAF很难在低噪声和高输入阻抗的条件下实现低面积,并且DR也有一定的限制。而基于VCO的连续时间delta-si...
Time-based ADCA 6-bit hieratical time-to-digital (TDC) architecture suitable for time-based ADC circuits is presented in this paper. The design consists of similar stages at which each stage recovers one bit. Using the proposed architecture, the total number of bits can be increased without ...
Due to technology scaling, the design of the conventional-type analog-to-digital converter (ADC), which uses an operational amplifier as one of its building blocks, becomes more difficult. In this brief, new techniques to design time-based ADC (TADC), which uses a voltage-controlled oscillator...
The integration time of each pixel can be optimised individually and automatically. Using a time-based pixel-level ADC with two-step background suppression, the signal-to-noise ratio and dynamic range can be improved to 88.8 and 95.1 dB, respectively....
Time-based ADC is an essential block in designing software radio receivers because it exhibits higher speed and lower power compared to the conventional AD... H Mostafa,YI Ismail - IEEE 被引量: 15发表: 2014年 TIME-BASED ANALOG-TO-DIGITAL CONVERTERS time-based analog-to-digital convertersata ...
1.A phase-locked loop (PLL) comprising:a time to voltage converter to convert a phase error corresponding to a time difference between a reference signal and a feedback signal of the PLL to one or more voltage signals; andan oscillator-based analog to digital converter (ADC) coupled to rec...
57 A 4.8GSs 7-ENoB Time-Interleaved SAR ADC with Dither-Based Background Timing 19:08 A 42Ghz 7b 16nm Massively time-interleaved slope-ADC 12:09 A 76mW 40GSs 7b Time-Interleaved Hybrid VoltageTime-Domain ADC with Common-Mode 20:19 A 12GSs 12b 4× Time-Interleaved Pipelined ADC with ...
A time-based analog-to-digital converter(ADC) employing a multi-phase voltage-controlled oscillator(VCO) is presented. The VCO is based on a ring oscillato... J Kim,S Cho - IEEE International Symposium on Circuits & Systems 被引量: 130发表: 2006年 Design Techniques for Linearity in Time...
Time-based ADC is an essential block in designing software radio receivers because it exhibits higher speed and lower power compared to the conventional AD... H Mostafa,YI Ismail - IEEE 被引量: 15发表: 2014年 Time-based read circuit for multi-bit memristor memories Memristor has attracted sign...
This routine is embodied in the procedures START-- AEC-- FILM-- X-RAYS and ADC-- WORK which are called upon the detection that the operator desires to perform an AEC (automatic exposure control) film exposure. This is illustrated in process flow diagram 600 of FIG. 6. At step 601 of ...