Wu, CY, Yang, SY, Chen, HH, Tseng, FC, Shih, CT (1984) An analytic and accurate model for the threshold voltage of short channel MOSFETs in VLSI. Solid-State Electron. 27: pp. 651-658C.-Y. Wu and S.-Y. Yang, “An analytic and accurate model for the threshold voltage of ...
5.Electro-Optical Properties of Low-Threshold Voltage PDLC Films低阈值电压聚合物分散性液晶膜的电光特性 6.Ultra-Low-Threshold Varistors Based on Columnar ZnO Thin Films基于柱状ZnO薄膜的超低阈值电压压敏电阻 7.Design and Analysis of Electrostatic Microrelay with Low Threshold Voltage in MEMS基于MEMS技术...
V. Narendar , Ramanuj Mishra , Sanjeev Rai , Nayana R and R. A. Mishra, "Threshold voltage control schemes In FinFETs," International Journal of VLSI design & Communication Systems (VLSICS), vol.3, no.2, April 2012.Narendar, V., Mishra, R., Rai, S., Nayana and Mishra R. A. ...
Complementary pass-transistor logic (CPL)[4], cascade voltage switch logic (CVSL)[5] and domino logic circuits [6] are used in modern VLSI applications in order to increase speed operation, reduce the power dissipation and the silicon area. The main advantage of these logic gates is the incr...
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold ... V Sundararajan,KK Parhi - International Symposium on Low Power Electronics & Design 被引量: 188发表: 1999年 Ultra-low power digital su...
therefore it has been applied widely in VLSI design [6]. Ascan be seen from Fig.l, taking the domino OR gates withDTV as an example, the critical signal transitions determiningthe domino circuit delay occur along the evaluation path. In adual V, domino circuit, theref...
Threshold Voltage Abstract One of the most important physical parameters of a MOSFET is its threshold voltageVth, defined as the gate voltage at which the device starts to turn on. The accurate modeling of threshold voltage is important to predict correct circuit behavior from a circuit simulator....
Pineda de Gyvez, J. and Rodriguez-Montanes, R. (2003). Threshold Voltage Mismatch (∆VT) Fault Modeling. Proc. of the 21st IEEE VLSI Test Symposium.J. de Gyvez and R. Rodriguez-Montanes, "Threshold voltage mismatch fault modeling," in Proc. 21st VLSI Test Symp., Apr. 2003, pp....
A Muttreja,P Mishra,NK Jha - International Conference on Vlsi Design 被引量: 21发表: 2008年 Vertical silicon-on-nothing FET: Threshold voltage calculation using compact capacitance model The silicon-on-nothing (SON) technology promises improved short-channel performance for ultra-scaled CMOS, withou...
Low power adder with adaptive supply voltage Demands for the low power VLSI have been pushing the development of aggressive design methodologies to reduce the power consumption drastically. To meet th... H Suzuki,W Jeong,K Roy - International Conference on Computer Design 被引量: 32发表: 2003年...