The first gate ZRQ not only implements all Boolean functions but also can be used to design optimised adder/subtraction architectures. One of the prominent functionalities of the proposed ZRQ gate is that it can work by itself as a reversible full adder/subtraction unit. The second gate NC can...
DNA‐based reversible full‐adderDNA‐based subtractorreversible gatesThis chapter presents designs of DNA‐based adder, subtractor, and comparator. The use of hybridization and displacement of strands DNA‐based platform are developed to implement adder, subtractor, and comparator arithmetic processes. ...
(5+2 inverted right perpendicular log n inverted left perpendicular)Delta G diminished-1 modulo-(2(n)+1) unified adder/subtractor with full zero handling Modulo-(2(n)+1) subtractionModulo-(2(n)+1) additionUnified adder/subtractorResidue number systemComputer arithmeticPerformance of modulo-(2(...
系统标签: subtractionaddersadderarithmeticaprslide Apr.2007ComputerArithmetic,Addition/SubtractionSlide1 PartII Addition/Subtraction NumberRepresentation NumbersandArithmetic RepresentingSignedNumbers RedundantNumberSystems ResidueNumberSystems Addition/Subtraction BasicAdditionandCounting Carry-LookaheadAdders VariationsinFast...
11 shows one embodiment of a redundant adder being used to perform subtraction on operands received in redundant form using one possible arithmetic apparatus and one possible method of providing adjustment input. [0035] FIG. 12 shows another embodiment of a redundant adder being used to perform ...
Kind Code: A1 Abstract: The arithmetic circuit has a parallel adder/subtractor as a main circuit, and multiplies according to a direct addition count process. Division is carried out using a direct subtraction count process. The multiplicand or the divisor is processed with normal bit-significance...
Designing novel reversible BCD adder and parallel adder/subtraction using new reversible logic gates, International Journal of Electronics, 99(10): 1395-1414.R.G. Zhou, M. Zhang, Q. Wu, Y. Shi, Designing novel reversible BCD adder and paralleladder/subtraction using new reversible logic gates...
PROBLEM TO BE SOLVED: To provide an adder supporting multiple data types, and a method of supporting addition and subtraction in multiple data types using said adder.SOLUTION: An adder supporting multiple data types through controlling carry propagation is disclosed. The adder according to an ...
Designing novel reversible BCD adder and parallel adder/subtraction using new reversible logic gates, International Journal of Electronics, 99(10): 1395-1414.R.G. Zhou, M. Zhang, Q. Wu, Y. Shi, Designing novel reversible BCD adder and paralleladder/subtraction using new reversible logic gates...
The serial addition-subtraction circuit according to the subject of the invention has a dual full adder-subtractor (1), which can be switched from addition to subtraction and vice versa, and a two-value correction circuit (5), using which the number 6 (LHHL) or the number 10 (HLHL) can...