In a computer system comprising a memory (50), one or more processors (54, 56, 58), and a controller unit (60) coupled with the or each processor and the memory, virtual page class key protection is used to ensure that multiple threads (52) of a process may not concurrently access ...
A memory request requiring ordered memory accesses is identified in one of the two or more streams of memory requests. The memory request requiring ordered memory accesses is stalled upon determining a previous memory request from a different stream of memory requests is pending. The memory access ...
United States Application US20130151799 Note: If you have problems viewing the PDF, please make sure you have the latest version ofAdobe Acrobat. Back to full text
In a computer system comprising a memory (50), one or more processors (54, 56, 58), and a controller unit (60) coupled with the or each processor and the memory, virtual page class key protection is used to ensure that multiple threads (52) of a process may not concurrently access ...
each memory request issued by the behavioral model to the bus emulator for any memory address other than the coherency check address, each respective move-in of a copy of each memory address, each access of each of the logged memory addresses, and each access of each logged coherency check ...
Stream memory request is divided into two or more streams of the memory request, the memory access counter is incremented for each memory request. Memory requests that require memory access that has been ordered is identified in one of the streams of the two or more memory requests. Memory ...
Stream memory request is divided into two or more streams of the memory request, the memory access counter is incremented for each memory request. Memory requests that require memory access that has been ordered is identified in one of the streams of the two or more memory requests. Memory ...
The disclosure is directed to a weakly-ordered processing system and method for enforcing strongly-ordered memory access requests in a weakly-ordered processing system. The processing system includes a plurality of memory devices and a plurality of processors. Each of the processors are configured to...
The disclosure is directed to a weakly-ordered processing system and method for enforcing strongly-ordered memory access requests in a weakly-ordered processing system. The processing system includes a plurality of memory devices and a plurality of processors. Each of the processors are configured to...
AUTO-ORDERING OF STRONGLY ORDERED DEVICE AND EXCLUSIVE TRANSACTIONS ACROSS MULTIPLE MEMORY REGIONSPROBLEM TO BE SOLVED: To provide efficient techniques for controlling ordered accesses in a weakly ordered storage system.JASON LAWRENCE PANAVICHジェイソンローレンスパナヴィッチJAMES NORRIS DIEFFENDERFER...