We also propose the first technique for online testing of single line faults in sequential reversible circuits.Mozammel H. A. KhanJacqueline E. RiceVLSI Design: International Journal of Custom-Chip Design, Simulation, and Testing
In this table xe k , xo k – input values, and ye k , yo k – output values, respectively, in the upper and lower channels filter bank analysis (synthesis) in the k -th time value. The parameters s0, s1, s2 define the arithmetic shift values. These parameters are computed according...
“A VLSI Architecture for Lifting-Based Forward and Inverse Wavelet Transform,” K. Andra, C. Chakrabarti, T. Acharya, IEEE Trans. Of Signal Processing, vol. 50, No. 40, pp. 966-977, Apr. 2002. Acharya, T., and C. Chakrabarti, “A Survey on Lifting-Based Discrete Wavelet Transform...
In recent VLSI design of digital data paths, significantly more area is occupied by interconnect elements than by functional units and registers. Nevertheless, until recently most work in data path synthesis has been concentrated on trying to reduce the area of functional units and registers, ...
In this paper we investigate the behaviour of GALS (Globally Asynchronous Locally Synchronous) systems in the context of VLSI circuits. The specification of a system is given in the form of a Petri net. Our aim is to re-design the system to optimise signal management, by grouping together ...