L2C-310 enabling early BRESP for Cortex-A9L2C-310 full line of zeros enabled for Cortex-A9L2C-310 ID prefetch enabled, offset 16 linesL2C-310 dynamic clock gating enabled, standby mode enabledL2C-310 cache cont
L2C-310 enabling early BRESP for Cortex-A9L2C-310 full line of zeros enabled for Cortex-A9L2C-310 ID prefetch enabled, offset 16 linesL2C-310 dynamic clock gating enabled, standby mode enabledL2C-310 cache controller enabled, 16 ways, 256 kBL2C-310: CACHE_ID 0x410...
L2C-310 enabling early BRESP for Cortex-A9L2C-310 full line of zeros enabled for Cortex-A9L2C-310 ID prefetch enabled, offset 16 linesL2C-310 dynamic clock gating enabled, standby mode enabledL2C-310 cache controller enabled, 16 ways, 256 kBL2C-310: CACHE_ID 0x410000c8, AUX...