Spread spectrum clock generation circuit, jitter generation circuit and semiconductor devices. 一种用简单的配置能进一步减小电磁辐射的扩频时钟产生电路,特别是在使用电流控制振荡器(ICO)的扩频时钟产生电路中,产生添加了其周期或振幅变化的扩频调制信号的差分信号,把差分信号施加到ICO并产生时钟. One kind of simple...
The Spread-Spectrum-Clock Generation(SSCG) technique is the latest technology to decrease electromagnetic radiation of the electronic system. 扩展频谱时钟技术是一种用来降低电子系统电磁辐射的最新技术,近年来在国外已被成功地用于以微处理器为核心的电子设备以及外设。 更多例句>> 3...
Spread-spectrum clock generation (SSCG) is widely used by manufacturers of electronic devices to reduce the spectral density of the electromagnetic interference (EMI) generated by these devices. Manufacturers must ensure that levels of electromagnetic en
Spread spectrum clock generation circuit, jitter generation circuit and semiconductor device A spread spectrum clock generation circuit capable of further reducing the electromagnetic wave radiation with a simple configuration has been disclosed and, particularly in a spread spectrum clock generation circuit ...
All other trademarks are the property of their respective owners.SummaryConsumer display applications commonly use high-speed LVDS interfaces to transfer video data. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC) issues within these consum......
designers. A spread-spectrum clock (CLK) is an efficient way to reduce EMI. This article describes how the spread-spectrum CLK is defined, and provides a simple formula for estimating the EMI suppression. The resulting formula is verified by data generated by the Maxim CLK Generation chip, ...
United States Patent US8037336 Note: If you have problems viewing the PDF, please make sure you have the latest version ofAdobe Acrobat. Back to full text
扩频时钟技术(Spread+Spectrum+Clock+Technology)对降低电磁干扰(EMI)的作用及实现方法
United States Application US20190173454 Note: If you have problems viewing the PDF, please make sure you have the latest version ofAdobe Acrobat. Back to full text
Spread spectrum clock generators. A phase lock loop generates an output clock according to a first input clock and a second input clock, a delay line is coupled between the first input clock and the phase lock loop. A modulation unit provides a modulation signal to control the delay line the...