i-cache-block-size = <64>; i-cache-sets = <64>; i-cache-size = <16384>; i-tlb-sets = <1>; i-tlb-size = <32>; mmu-type = "riscv,sv39"; next-level-cache = <&L4 &L1>; reg = <0>; riscv,isa = "rv64imafdcs"; status = "okay"; tlb-split; L12: interrupt-control...