必应词典为您提供shared-memory-multiprocessor-system的释义,网络释义: 共用记忆体多处理器系统;共享内存的多处理器系统;共享式记忆体多处理系统;
Multiprocessor system, having a translation lookaside buffer (TLB) in each processor, and having a structure for avoiding TLB purge overhead. Each processor node is provided with a partial main memory and a physical page map table (PPT). The PPT stores mapping between physical page number of ...
A multiprocessor system comprising a core memory (RAM), processing units (CPU.sub.1 -CPU.sub.j), each being provided with a cache memory (MCj), a directory (RG.sub.j) and a management processor (PG.sub.j) ; the core memory (RAM) is connected to an assembly of shift registers (RDM...
Finally, a cache-only architecture has no global memory, per se, but allows writeable data to move to the cache of the processor that has most recently updated it. A symmetrical multiprocessor (SMP) architecture is a shared-memory architecture in which all processors run operating system kernels...
A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip The growing trend in current complex embedded systems is the use of multiprocessor system-on-chip (MPSoC). An MPSoC consists of multiple heterogeneous processing elements, a memory hierarchy, and input/output ...
Haskell on a Shared-Memory Multiprocessor Tim Harris Simon Marlow Simon Peyton Jones Microsoft Research, Cambridge {tharris,simonmar,simonpj}@microsoft.com Abstract Multi-core processors are coming, and we need ways to program them. The combination of purely-functional programming and ex- plicit, ...
(屏障), busy-waiting(忙等待), conditions(条件), locality(局域性), locking(加锁), memory models(内存[1]模型), monitors(管程), multiprocessor architecture(多处理器架构), nonblocking algorithms(非阻塞算法), scheduling(调度), semaphores(信号量), synchronization(同步/同步性), transactional memory(...
We show that under certain reasonable assumptions about the memory system, it is possible to conclude sequential consistency for any number of processors. Memory locations, and data values by model checking two finite state lemmas about process and merge invariants: they involve two processors each ...
A Primer on Memory Consistency and Cache Coherence 1. Introduction Consistency和coherence的最终目的都是保证shared memory system工作正确。Memory consistency是一个架构"specification",规定了“ISA允许的正确行为”,而cache coherence是一个"means",是支持consistency以及保证shared memory程序正确运行的机制。
In this paper, we consider sparse Cholesky factorization on a multiprocessor system that possesses a globally shared memory. Our algorithm is a parallel version of a serial blocked left-looking factorization algorithm. Unlike previous parallel left-looking algorithms, the new algorithm uses a matrix-ma...