set_property CFGBVS VCCO [current_design] set_property CONFIG_VOLTAGE 3.3 [current_design] ### create clock ### #set_property -dict { PACKAGE_PIN R4 IOSTANDARD LVDS_25 } [get_ports { CLK200MHZ_p }]; #set_property -dict { PACKAGE_PIN T4 IOSTANDARD LVDS_25 } [get_ports { CLK200...
VCCO of Bank 0 = 1.8V (with 1.8V signaling for whatever is connected to Bank 0); VCCO of Bank 14/15 = 1.8V (when used during configuration) Note that CFGBVS does not apply to the Virtex-7 HT devices, where bank 0 is an HP bank. ...